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ge data sheet august 20, 2013 ?2013 general electric company. all rights reserved. page 1 ? cp2000dc54-pe compact powe r line dc/dc converter input: -40 to -72vdc; outputs: 54 vdc @ 2000w; 5 vdc @ 4w features ? compact 1-ru form factor providing 22 w/in3 ? input current < 60a at 40 vdc input ? programmable output voltage from 44v to 58 vdc, ? output defaulted to 54v ? rs485 1 and pmbus compliant dual i 2 c serial bus communications ? designed to ieee802.3af compliance, 2250 output*** isolation to chassis/signals for poe applications. (see ordering info) ? dc output over-voltage and over-current protection ? dc input over-voltage and under-voltage protection ? over-temperature warning and protection ? redundant, parallel operation with active load sharing and isolated redundant +5v aux power, isolated signals and i 2 c communications ? remote on/off ? hot insertion/removal (hot plug) ? four front panel led indicators ? ul* recognized to ul60950-1, can/ csa ? c22.2 no. 60950-1, and vde ? 0805-1 licensed to iec60950-1 ? ce mark meets 2006/95/ec directive ? internal variable-speed fan control ? rohs 5 compliant ? poe compliant to ieee802.3af applications ? 48vdc distributed power architectures ? power over ethernet ? routers/switches ? voip/soft switches ? lan/wan/man applications ? file servers ? indoor wireless ? telecommunications equipment ? enterprise networks ? san/nas/iscsi applications ? advanced workstations description the cp2000dc54-pe dc/dc converter, al so called a power entry module (pem) in the compact power line platform is specifically designed to operate as an integral part of a complete distributed power system. the high-density, front- to-back airflow pem is designed for mini mal space utilization and is highly expandab le for future growth. it is provided with many features including poe isolation, and dual-redundant i 2 c communications busses that allow it to be used in a broad range of applications. these signal s and the 5v auxiliary supply are isol ated from the main output and frame ground. the flexible feature set makes this power entry modu le an excellent choice for applications requiring modular dc-to-dc bulk intermediate voltages, such as in distributed power. * ul is a registered trademark of underwriters laboratories, inc. ? csa is a registered trademark of canadian standards association. ? vde is a trademark of verband deutscher elektrotechniker e.v. this product is intended for integration into end-user equipmen t. all the required procedures for ce marking of end-user equi pment should be followed. (the ce mark is placed on selected products.) ** iso is a registered trademark of the international organization of standards. 1 introduced in 2011
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 2 electrical specifications input parameter min typ max units notes operating voltage -40 -72 vdc low input shutdown of main output -38.5 -39 -39.5 vdc input turn-on of both outputs -43 -43.5 -44 vdc reverse input voltage the module shall not be damaged idling power output off output on 35 60 w 5vdc output at no-load both outputs at no-load input current 60 adc at input voltages > 40vdc cold start inrush current 60 adc measured at 25 ? c for all line conditions. does not include x- capacitor charging spike efficiency 88 82 90 84 % from 75% to 100% of full load for loads > 25% of full load holdup time 8 ms minimum vin = 48vdc, output at ? full load, output can droop down to -40vdc ride through 8 ms input capacitance 25 ? f main output parameter min typ max units notes maximum output power 2000 w at voltages > 54vdc output voltage setpoint 54 vdc output floats with respect to frame ground. voltage regulation set point at 50% fl set point tolerance set point regulation droop regulation droop accuracy -0.5 -1 -5 54 1 0.5 1 5 vdc % % vdc % resets to factory setting if power is removed all conditions (temp, line, drift) linear from 1 to 39 a. all conditions (temp, line, drift) output voltage range 44 58 vdc set either by i 2 c, or analog margining. output current 0.1 37 a at 54vdc. below 0.1a the module meets its regulation requirements. reverse (sink) output current 0.5 a isolation function provided active current share -5 5 %fl single-wire connection. loads > 25%fl passive current share -15 +15 %fl between modules without the single wire connection. loads > 25%fl output ripple (5 to 20mhz) rms peak-to-peak 250 500 mvrms mvpk-pk measured with 20mhz bandwidth under any condition of loading. minimum load is 1a. external bulk load capacitance 0 5,000 ? f external capacitance can be increased but the power supply will not meet its turn -on rise time requirement.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 3 electrical specifications (continued) output (continued) parameter min typ max units notes turn-on delay rise time 2 overshoot 5 500 5 s ms % monotonic turn_on after detection of valid dc input voltage. measured from 30% to 100% of vnom. restart shutdown delay 20 s shutdown is delayed during a re-start in order to guarantee restart of multiple paralleled modules. load step response ? i ? v response time 2.0 2 50 %fl vdc ms ? i/ ? t slew rate 1a/s. settling time to within regulation requirements. overload 3 current limit shutdown 38.9 43 39 adc vdc fold-down. default state ? hiccup mode system start-up a 20 second shutdown delay is implemented to allo w modules to be plugged in one at a time. during this time fold-down occurs but the module will not shut down below 39vdc. over-voltage delayed instantaneous latchoff 60 65 vdc vdc 200msec delayed shutdown implemented. latched shutdown without hiccup. three restart attempts are implemented within a one mi nute window prior to a latched shutdown when vout < 65vdc. beyond 1 minute the counter restarts over-temperature warning shutdown auto-recoverable 20 5 c c implemented prior to commencement of an ot shutdown below the maximum rating of the device being protected temperature hysteresis of approximately 10 c provided between shutdown and restart. auxiliary output parameter min typ max units notes on when the input voltage is -26 -72 vdc output voltage set point 5.2 vdc isolated from the main output to meet poe requirements. 50ma dedicated for powering adjacent pems during a fault. 700ma available for external use. output current 0.005 0.75 a overall regulation -5 +5 % ripple and noise 50 100 25 mvpk-pk mvrms 20mhz bandwidth. measured across a 1 ? f tantalum and a 0.1 ? f ceramic capacitor over-voltage clamp 7 vdc over-current limit 110 175 %fl isolation from the main output 2250 vdc isolation from frame ground 50 vdc a 1m ? noise suppression resistor is connected between logic_grd and frame_grd. 2 below -5 ? c the rise time is approximately 5 minutes to protect bulk capacitors in the unit 3 hiccup performance attempts automatic recovery from an overlo ad shutdown with approximately a 90% off-time duty cycle. the d uty cycle varies periodically in order to guarantee multi-module recovery synchronization. latchoff can be chosen via software instead of the default hiccup. recovery from a latchoff requires enabling, or software commanding off followed by an on after a 2 second delay.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 4 mechanical, environmental and emc specifications dimensions (nominal) length (in./mm) 13.85 / 351.8 width (in./mm) 4.00 / 101.6 height (in./mm) 1.66 / 42.2 weight (lb/kg) 4.6 / 2.1 environmental parameter min typ max units notes ambient temperature operating ambient derating power derating 2 -5 4 1 45 1 c c %/c air inlet from sea level to 5,000 feet. per 1,000 feet above 5,000 feet. up to 55c storage temperature -40 85 c humidity 5 95 % relative humidity, non-condensing shock and vibration operational test test levels drop and tip over iec 68-2 iec 721-3-2 iec 68-2-31 earthquake rating 4 zone per telcordia gr-63-core, all floors, when installed in cp shelf. emc, performance parameter min typ max units notes radiated emissions 5 fcc and cispr22 (en55022) - class a 3 conducted emissions - dc telcordia gr-1089-core and cispr22 (en55022) - class a esd error free per en/iec 61000-4-2 level 4 (8 kv contact discharge, 15 kv air discharge). radiated immunity error free per en/iec 61000-4-3 level 3 (10 v/m). differential mode surge 100 vdc ansi t1.315, no errors differential mode surge transient 1000 vdc no errors. ieee c62.41 defined pulse transient common mode surge (1.2/50 ? s pulse) 1000 vdc conducted immunity error free per en/iec 61000-4-6 level 3 (10vrms). reliability (calculated) 400,000 hours at ambient of 25c at full load per telcordia sr-332, reliability prediction for electronic equipment, method i case iii. isolation input-chassis/signals input-output/signals output-chassis/signals main-aux outputs 1700 2250 2250 2250 vdc per en60950. per ieee802.3af. service life 10 years 25c ambient, full load excluding fans. acoustic noise 55 dba noise is proportional to fan speed, load and ambient temperature. 4 designed to start at an ambient as low as -40c, but may not meet operational limits until above -5c. 5 radiated emissions compliance was met using a lineage power shelf. this shelf includes output common and differential mode capa citors that assist in meeting compliance.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 5 status and control the pem provides two means for monitor/control: analog or i 2 c. details of analog controls are provided in this data sheet under signal definitions. ge energy will provide separate application notes on the i 2 c protocol for users to interface to the cpl pems. contact your local ge energy representative for details. hot plug when rapidly extracting and reinserting modules care should be taken to allow for discharging the internal bias supply so that a predictable restart could be achieved. the way to ensure that the circuit sufficiently discharges is to observe the spinning of the fans after an extraction. the unit should not be reinserted until the fans stop spinning. without bleeding down internal bias the module may remember its last assigned address and may not configure itself properly if reinserted into another slot. control definitions all signals are referenced to logic_grd unless otherwise noted. see the signal definitions table at the end of this document for further description of all the signals. control signals margining: set point of the pem can be changed via this input pin. programming can be either a voltage source or a resistance divider. the margining pin is connected to 3.3vdc via a 10k ? resistor inside the pem. see graphs below. o u t p u t s e t p o i n t ( v d c ) -58 -46 0.1 3.3vdc 1 0 k vcontrol v p r o g r a m -44 0 an open circuit on this pin reverts the voltage level back to the original setting. software commanded margining overrides the hardware set point indefinitely or until the default setting is reinstated for example if input power and bias power have been removed from the module. module present signal: this signal has dual functionality. it can be used to alert the system when a module is inserted. a 500 ? resistor is present in series between this signal and logic_grd. an external pull-up should not raise the voltage on the pin above 0.25vdc. above 1vdc, the write_protect feature of the eeprom is enabled. protocol select: establishes the communications mode of the power supply, between analog/i 2 c and rs485 modes. for rs485, connect 10k ? pull-down resistor to 54_out(-dc). enable: on/off control when i 2 c communications are utilized as configured by the protocol pin. this pin must be pulled low to turn on the power supply. the power supply will turn off if either the enable or the on/off pin is released. this signal is referenced to logic_grd. on/off: this is a short pin utilized for hot-plug applications to ensure that the power supply turns off before the power pins are disengaged. it also ensures that the power supply turns on only after the power pins have been engaged. must be connected to v_out (-dc). status signals power_ok: this signal is hi when the main output is present and goes lo when the main output is not present. i_limit: this signal is hi when the main output is not in current limit and goes lo when current limit has activated. alert #: i 2 c interrupt signal. fault: this signal goes lo for any failure that requires pem replacement. some of these faults may be due to: fan failure over-temperature condition over-temperature shutdown over-voltage shutdown internal pem fault
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 6 digital feature descriptions pmbus? compliance: the power supply is fully compliant to the power management bus (pmbus?) rev1.2 requirements with the following exceptions: the power supply continuously updates its status and alarm registers to the latest state in order to capture the ?present? state of the power supply. there are a number of indicators, such as those indicating a communications fault (pec error, data error) that do not get cleared until specifically instructed by the host controller sending a clear_faults command. a ?bit? indicator notifies the user if the status and alarm registers changed since the last ?read? by the host controller. for example, if a voltage surge causes a momentary shutdown for over voltage the power supply will automatically restart if the ?auto_restart? feature is invoked. during the momentary shutdown the power supply issues an alert# indicating to the system controller that a status change has occurred. if the system controller reads back the status and alarm registers while the power supply is shut down it will get the correct fault condition. however, inquiry of the state of the power supply after the restart event would indicate that the power supply is functioning correctly. the status and alarm indicators did not freeze at the original shutdown state and so the reason for the original alert# is erased. the restart ?bit? would be set to indicate that an event has occurred. the power supply also clears the status and alarm registers after a successful read back of the information in these registers, with the exce ption of communications error alarms. this automated process improves communications efficiency since the host controller does not have to issue another clear_faults command to clear these registers. dual, redundant buses: two independent i 2 c lines provide true communications bus redundancy and allow two independent controllers to sequentially control the power supply. for example, a short or an open connection in one of the i 2 c lines does not affect communications capability on the other i 2 c line. failure of a ?master? controller does not affect the power supplies and the second ?master? can take over control at any time. using the pca9541 multiplexer: transition between the two i 2 c lines is provided by the pca9541 i 2 c/01 master selector multiplexer, which, upon start-up, connects channel 0. applications using only a single i 2 c line can immediately start talking across the bus without first requiring to reconfigure the multiplexer. diagram showing the dual i 2 c bus system. control can be taken over at any time by a specific ?master? even during data transmission to the other ?master?. the ?master? needs to be able to handle incomplete transmissions in the multi-master environment in case switching should commence in the middle of data transmission. master/slave: the ?host controller? is always the master. power supplies are always slaves. slaves cannot initiate communications or toggle the clock. slaves also must respond expeditiously at the command of the master as required by the clock pulses generated by the master. clock stretching: the ?slave? controller inside the power supply may initiate clock stretching if it is busy and it desires to delay the initiation of any further communications. during the clock stretch the ?slave? may keep the clock lo until it is ready to receive further instruct ions from the host controller. the maximum clock stretch interval is 25ms. the host controller needs to recognize this clock stretching, and refrain from issuing the next clock signal, until the clock line is released, or it needs to delay the next clock pulse beyond the clock stretch interval of the power supply. note that clock stretching can only be performed after completion of transmission of the 9 th ack bit, the exception being the start command. example waveforms showing clock stretching. communications speed: both 100khz and 400khz clock rates are supported. the power supplies default to the 100khz clock rate. packet error checking: the power supply will not respond to commands without the trailing pec. the integrity of communications is compromised if packet error correction is not employed. there are many functional features, including turning off the main output, that require validation to ensure that the correct command is executed. pec is a crc-8 error-checking byte, based on the polynomial c(x) = x 8 + x 2 + x + 1, in compliance with pmbus? requirements. the calculation is based in all message bytes, including the originating write address and command bytes preceding read instructions. the pec is appended to the message by the device that supplied the last byte. smbusalert#: the power supply can issue smbalert# driven from either its internal micro controller (c) or from the pca9541 i 2 c bus master selector. that is, the smbalert# signal of the internal c funnels through the pca9541 master selector that buffers the smbalert# signal and splits the signal to the two smbalert# signal pins exiting the power supply. in addition, the pca9541 signals its own smbalert# clock stretch
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 7 request to either of the two smbalert# signals when required. non-supported commands: non supported commands are flagged by setting the appropriate status bit and issuing an smbalert# to the ?host? controller. data out-of-range: the power supply validates data settings and sets the data out-of-range bit and smbalert# if the data is not within acceptable range. smbalert# triggered by the c: the c driven smbalert# signal informs the ?master/host? controller that either a state or alarm change has occurred. normally this signal is hi. the signal will change to its lo level if the power supply has changed states and the signal will be latched lo until the power supply receives a ?clear? instruction as outlined below. if the alarm state is still present after the ?clear_faults? command has been received, then the signal will revert back into its lo level again and will latch until a subsequent ?clear? signal is received from the host controller. the signal will be triggered for any state change, including the following conditions; ? vin under or over voltage ? vout under or over voltage ? iout over current ? over temperature warning or fault ? fan failure ? communication error ? pec error ? invalid command ? internal faults the power supply will clear the smbusalert# signal (release the signal to its hi state) upon the following events: ? completion of a ?read_status? instruction ? receiving a clear_faults command ? the main output recycled (turned off and then on) via the enable signal pin ? the main output recycled (turned off and then on) by the operation command smbalert# triggered by the pca9541: if clearing the alert# signal via the clear_faults or read back fails, then reading back the alert# status of the pca9541 will be necessary followed by clearing of the pca9541 alert#. the pca9541 can issue an alert# even when single bus operation is selected where the bus master selector has not been used or addressed. this may occur because the default state of the pca9541/01 integrated circuit issues alert# to both i 2 c lines for all possible transitioning states of the device. for example, a reset caused by a glitch would cause the alert# to be active. if the pca9541 is not going to be used in a specific application (such as when only a single i 2 c line is utilized), it is imperative that interrupts from the pca9541 are de- activated by the host controller. to de-activate the interrupt registers the pca9541 the ?master? needs to address the pca9541 in the ?write? mode, the interrupt enable (ie) register needs to be accessed and the interrupt masks have to be set to hi ?1?. (note: do not mask bit 0 which transmits alert# from the power supply). this command setting the interrupt enable register of the pca9541 is shown below; start unit address ack 1 7 6 5 4 3 2 1 0 1 s 1 1 1 0 a2 a1 a0 0 a command code ack ie register stop 8 1 8 0x00 a 0x0e p there are two independent interrupt enable (ie) registers, one for each controller channel (i 2 c-0 and i 2 c-1). the interrupt register of each channel needs to be configured independently. that is, channel i 2 c-0 cannot configure the ie register of i 2 c-1 or vise-versa. this command has to be initiated to the pc9541 only once after application of power to the device. however, every time a restart occurs the pca9541 has to be reconfigured since its default state is to issue alert# for changes to its internal status. if the application did not configure the interrupt enable register the alert# line can be cleared (de-activated), if it has been activated by the pca9541, by reading back the data from the interrupt status registers (istat). refer to the pca9541 data shee t for further information on how to communicate to the pca9541 multiplexer. please note that the pca9541 does not support packet error checking (pec). re-initialization: the i 2 c code is programmed to re-initialize if no activity is detected on the bus for 5 seconds. re- initialization is designed to guarantee that the i 2 c controller does not hang up the bus. although this rate is longer than the timing requirements specified in the smbus specification, it had to be extended in order to ensure that a re-initialization would not occur under normal transmission rates. during the few seconds required to accomplish re- initialization the i 2 c controller may not recognize a command sent to it. (i.e. a start condition). global broadcast: this is a powerful command because it can instruct all power supplies to respond simultaneously in one command. but it does have a serious disadvantage. only a single power supply needs to pull down the ninth acknowledge bit. to be certain that each power supply responded to the global instruction, a read instruction should be executed to each power supply to verify that the command properly executed. the global broadcast command should only be executed for write instructions to slave devices. note: the pca9541 i2c master selector does not respond to the global broadcast command. read back delay: the power supply issues the smbalert # notification as soon as the first state change occurred. during an event a number of different states can be transitioned to before the final event occurs. if a read back is implemented rapidly by the host a successive smbalert# could be triggered by the transitioning state of the power supply. in order to avoid successive smbalert# s and read back and also to avoid reading a transitioning state, it is prudent to wait more than 2 seconds after the receipt of an smbalert# before executing a read back. this delay will
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 8 ensure that only the final state of the power supply is captured. successive read backs: successive read backs to the power supply should not be attempted at intervals faster than every one second. this time interval is sufficient for the internal processors to update their data base so that successive reads provide fresh data. device id: address bits a2, a1, a0 set the specific address of the power supply. the least significant bit x (lsb) of the address byte configures write [0] or read [1] events. in a write command the system instructs the power supply. in a read command information is being accessed from the power supply. address bit 7 6 5 4 3 2 1 0 pca9541 1 1 1 0 a2 a1 a0 r/w micro controller 1 0 0 0 a2 a1 a0 r/w external eeprom 1 0 1 0 a2 a1 a0 r/w global broadcast 0 0 0 0 0 0 0 0 msb lsb the global broadcast instruction executes a simultaneous write instruction to all power supplies. a read instruction cannot be accessed globally. the three programmable address bits are the same for all i 2 c accessible devices within the power supply. pmbus tm commands standard instruction: up to two bytes of data may follow an instruction depending on the required data content. analog data is always transmitted as lsb followed by msb. pec is mandatory and includes the address and data fields. 1 8 1 8 1 s slave address wr a command code a 8 1 8 1 8 1 1 low data byte a high data byte a pec a p master to slave slave to master smbus annotations; s ? start , wr ? write, sr ? re-start, rd ? read, a ? acknowledge, na ? not-acknowledged, p ? stop direct mode data format: the direct mode data format is supported, where y = [ mx + b ] x 10 r . in the equation, y is the data value from the controller and x is the ?real? value either being set or returned. for example, to set the output voltage to 50.45v dc , multiply the desired set point by the m constant, 50.45 x 400 = 20,180. convert this binary number to its hex equivalent: 20,180b = 0x4ed4. the result is sent lsb=0xd4 first, then msb=0x4e. the constants are function operation m b r output voltage output voltage shutdown write / read 400 0 0 output current read 5 0 0 temperature read 1 0 0 input voltage read 1 75 0 input power read 1 0 0 fan speed setting ( % ) read 1 0 0 fan speed in rpm read 100 0 0 pmbus tm command set: command hex code data field function operation 01 1 output on/off clear_faults 03 0 clear status vout_command 21 2 set vout vout_ov_fault_limit 40 2 set ov fault limit read_status d0 10 read status, v out , i out , t leds test on d2 0 test leds leds test off d3 0 service_led_on d4 0 service led service_led_off d5 0 enable_write d6 0 enable eeprom write disable_write d7 0 disable eeprom write inhibit_restart d8 0 latch upon failure auto_restart d9 0 hiccup isolation_test da 0 perform isolation test read_input_string dc 2 read vin and pin read_firmware_rev dd 3 firmware revisions read_run_timer de 3 accumulated on state fan_speed_set df 3 fan speed control fan_normal_speed e0 0 stop fan control read_fan_speed e1 4 fan control & speed stretch_lo_25ms e2 0 production test feature command descriptions operation (01h) : by default the power supply is turned on at power up as long as enable is active lo. the operation command is used to turn the power supply on or off via the pmbus. the data byte below follows the operation command. function data byte unit on 0x80 unit off 0x00 to reset the power supply cycle the power supply off, wait at least 2 seconds, and then turn back on. all alarms and shutdowns are cleared during a restart. clear_faults (03h): this command clears information bits in the status registers, these include: ? isolation ok ? isolation test failed ? restarted ok ? invalid command ? invalid data ? pec error vout_command (21h) : this command is used to change the output voltage of the power supply. changing the output voltage should be performed simultaneously to all power supplies operating in parallel using the global address (broadcast) feature. if only a single power supply is instructed to change its output, it may attempt to source all the required power which can cause either a power limit or shutdown condition.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 9 software programming of output voltage overrides the set point voltage configured during power_up. the program no longer looks at the ?margin pin? and will not respond to any hardware voltage setting. the default state cannot be accessed any longer unless power is removed from the dsp. to properly hot-plug a power supply into a live backplane, the system generated voltage should get re-configured into either the factory adjusted firmware level or the voltage level reconfigured by the margin pin. otherwise, the voltage state of the plugged in power supply could be significantly different than the powered system. voltage margin range: 42v dc ? 58 v dc . a voltage programming example: the task: set the output voltage to 50.45v dc the constants for voltage programming are: m = 400, b and r = 0. multiply the desired set point by the m constant, 50.45 x 400 = 20,180. convert this binary number to its hex equivalent: 20,180b = 4ed4h. transmit the data lsb first, followed by msb, 0 x d44eh. vout_ov_fault_limit (40h) : this command sets the output overvoltage shutdown level. manufacturer-specific pmbus tm commands many of the manufacturer-specific commands read back more than two bytes . if more than two bytes of data are returned, the standard smbus tm block read is utilized. in this process, the master issues a write command followed by the data transfer from the power supply. the first byte of the block read data field sends back in hex format the number of data bytes, exclusive of the pec number, that follows . analog data is always transmitted lsb followed by msb. a no-ack following the pec byte signifies that the transmission is complete and is being terminated by the ?host?. read_status (d0h) : this ?manufacturer specific? command is the basic read back returning status and alarm register data, output voltage, output current, and internal temperature data in a single read. 1 8 1 8 1 s slave address wr a command code a 1 8 1 8 1 sr slave address rd a byte count = 9 a 8 1 8 1 8 1 status-2 a status-1 a alarm-2 a 8 1 8 1 8 1 alarm-1 a voltage lsb a voltage msb a 8 1 8 1 8 1 1 current a temperature a pec na p status and alarm registers the content and partitioning of these registers is significantly different than the standard register set in the pmbus? specification. more information is provided by these registers and they are accessed rapidly, at once, using the ?multi parameter? read back scheme of this document. there are a total of four registers. all errors, 0 ? normal, 1 ? alarm. status-2 bit title description 7 pec error mismatch between computed and transmitted pec. the instruction has not been executed. clear_flags resets this register. 6 will restart restart after a shutdown = 1 5 invalid instruction the instruction is not supported. an alert# will be issued. clear_flags resets this register. 4 power capacity n/a 3 isolation test failed information only to system controller 2 restarted ok informs host that a successful restart occurred clearing the status and alarm registers 1 data out of range flag appears until the data value is within range. a clear_flags command does not reset this register until the data is within normal range. 0 enable pin hi state of the enable pin, hi = 1 = off isolation test failed: the ?system controller? has to determine that sufficient capacity exists in the system to take a power supply ?off line? in order to test its isolation capability. since the power supply cannot determine whether sufficient redundancy is available, the results of this test are provided, but the ?internal fault? flag is not set. status-1 bit title description 7 spare 6 isolation test ok isolation test completed successfully. 5 internal fault the power supply is faulty 4 shutdown 3 service led on on = 1 2 external fault the power supply is functioning ok 1 leds flashing leds tested test on = 1 0 output on on = 1 alarm-2 bit title description 7 fan fault 6 no primary no primary detected 5 primary ot primary section ot 4 dc/dc ot dc/dc section ot 3 output voltage lower than bus internal regulation failure 2 thermal sensor failed internal failure of a temperature sensing circuit 1 5v out_of_limits either ovp or ocp occurred 0 power delivery a power delivery fault occurred power delivery: the power supply compares its internal sourced current to the current requested by the current share pin. if the difference is > 10a, a fault is issued.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 10 alarm-1 bit title description 7 unit in power limit an over load condition that results in constant power 6 primary fault indicates either primary failure or input not present. used in conjunction with bit-0 and status_1 bits 2 and 5 to assess the fault. 5 over temp. shutdown one of the over_temperature sensors tripped the supply 4 over temp warning temperature is too high, close to shutdown 3 in over current shutdown is triggered by low output voltage < 39v dc . 2 over voltage shutdown 1 vout out_of_limits indication the output is not within design limits. this condition may or may not cause an output shutdown. 0 vin out_of_limits the input voltage is outside design limits leds test on (d2h) : will turn-on simultaneously the four front panel leds of the power supply sequentially 7 seconds on and 2 seconds off until instructed to turn off. the intent of this function is to provide visual identification of the power supply being talked to and also to visually verify that the leds operate and driven properly by the micro controller . leds test off (d3h) : will turn-off simultaneously the four front panel leds of the power supply. service led on (d4h) : requests the power supply to flash - on the service (ok-to-remove) led. the flash sequence is approximately 0.5 seconds on and 0.5 seconds off. service led off (d5h) : requests the power supply to turn off the service (ok-to-remove) led. enable write (d6h) : this command enables write permissions into the upper ? of memory locations for the external eeprom. a write into these locations is normally disabled until commanded through i 2 c to permit writing into the protected area. a delay of about 10ms is required from the time the instruction is requested to the time that the power supply actually completes the instruction. see the fru-id section for fu rther information of content written into the eeprom at the factory. disable write (d7h) : this command disables write permissions into the upper ? of memory locations for the external eeprom. unit in power limit or in current limit: when output voltage is > 36v dc the output led will continue blinking. when output voltage is < 36v dc , if the unit is in the restart mode, it goes into a hiccup. when the unit is on the output led is on, when the unit is off the output led is off. when the unit is in latched shutdown the output led is off. inhibit_restart (d8h) : the inhibit-restart command directs the power supply to remain latched off for over_voltage, over_temperature and over_current. the command needs to be sent to the power supply only once. the power supply will remember the inhibit instruction as long as internal bias is active. restart after a lachoff: to restart after a latch_off either of four restart mechanisms are available. the hardware pin enable may be turned off and then on . the unit may be commanded to restart via i2c through the operation command by first turning off then turning on . the third way to restart is to remove and reinsert the unit. the fourth way is to turn off and then turn on ac power to the unit. the fifth way is by changing firmware from latch off to restart. each of these commands must keep the power supply in the off state for at least 2 seconds, with the exception of changing to restart . a successful restart shall clear all alarm registers, set the restarted successful bit of the status_2 register. a power system that is comprised of a number of power supplies could have difficulty restarting after a shutdown event because of the non-synchronized behavior of the individual power supplies. implementing the latch-off mechanism permits a synchronized restart that guarantees the simultaneous restart of the entire system. a synchronous restart can be implemented by; 1. issuing a global off and then on command to all power supplies, 2. toggling off and then on the enable signal 3. removing and reapplying input commercial power to the entire system. the power supplies should be turned off for at least 20 ? 30 seconds in order to discharge all internal bias supplies and reset the soft start circuitry of the individual power supplies. auto_restart (d9h) : auto-restart is the default configuration for overvoltage, overcurrent and overtemperature shutdowns. however, overvoltage has a unique limitation. an overvoltage shutdown is followed by three attempted restarts, each restart delayed 1 second, within a 1 minute window. if within the 1 minute window three attempted restarts failed, the unit will latch off. if within the 1 minute less than 3 shutdowns occurred then the count for latch off resets and the 1 minute window starts all over again. this command resets the power supply into the default auto-restart configuration. isolation test (dah): this command verifies functioning of output or?ing. at least two paralleled power supplies are required. the host should verify that n+1 redundancy is established. if n+1 redundancy is not established the test can fail. only one power supply should be tested at a time. verifying test completion should be delayed for approximately 30 seconds to allow the power supply sufficient time to properly execute the test. failure of the isolation test is not considered a power supply fault because the n+1 redundancy requirement cannot be verified. the user must determine whether a true isolation fault indeed exists.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 11 read input string (dch) : reads back the input voltage and input power consumed by the power supply. in order to improve the resolution of the input voltage reading the data is shifted by 75v. 1 7 1 1 8 s slave address wr a command code 0xdc 1 1 7 1 1 a sr slave address rd a 8 1 8 1 byte count = 4 a voltage a 8 1 8 1 8 1 1 power - lsb a power - msb a pec no-ack p read_firmware_rev [0 x dd]: reads back the firmware revision of all three c in the power supply. 1 7 1 1 8 1 s slave address wr a command code 0xdd a 1 1 7 1 1 8 1 a sr slave address rd a byte count = 4 a 8 1 8 1 primary micro revision a dsp revision a 8 1 8 1 1 i2c micro revision a pec no-ack p for example; the read returns one byte for each device (i.e. 0 x 002114h ). the sequence is primary micro, dsp, and i 2 c micro. 0x00 in the first byte indicates that revision information for the primary micro is not supported. the number 21 for the dsp indicates revision 2.1, and the number 14 for the i2c micro indicates revision 1.4. read_run_timer [0 x de]: this command reads back the recorded operational on state of the power supply in hours. the operational on state is accumulated from the time the power supply is initially programmed at the factory. the power supply is in the operational on state both when in standby and when it delivers main output power. recorded capacity is approximately 10 years of operational state. 1 7 1 1 8 1 s slave address wr a command code 0xde a 1 7 1 1 8 1 sr slave address rd a byte count = 4 a 8 1 8 1 8 1 time - lsb a time a time - msb a 8 1 1 pec no-ack p fan_speed_set (dfh) : this command instructs the power supply to increase the speed of the fan. the transmitted data byte represents the hex equivalent of the duty cycle in percentage, i.e. 100% = 0 x 64h. the command can only increase fan speed, it cannot instruct the power supply to reduce the fan speed below what the power supply requires for internal control. fan_normal_speed (e0h): this command returns fan control to the power supply. it does not require a trailing data byte. read_fan_speed (e1h) : returns the commanded fan speed in percent and the measured fan speed in rpm from the individual fans. up to 3 fans are supported. if a fan does not exist (units may contain from 1 to 3 fans), or if the command is not supported the unit return 0x00. 1 8 1 8 1 s slave address wr a command 0xe1 a 1 8 1 8 1 sr slave address rd a byte count = 5 a 8 1 8 1 8 1 8 1 adjustment % a fan-1 a fan-2 a fan-3 a 8 1 1 pec na p stretch_lo_25ms (e2h) : command used for production test of the clock stretch feature. none supported commands or invalid data: the power supply notifies the master if a non-supported command has been sent or invalid data has been received. notification is implemented by setting the appropriate status and alarm registers and setting the smbalert# flag . fault management the power supply records faults in the status and alarm registers above and notifies the master controller as described in the alarm notification section of the non- conforming event. the status and alarm registers are continuously updated with the latest event registered by the rectifier monitoring circuits. a host responding to an smbusalert# signal may receive a different state of the rectifier if the state has changed from the time the smbusalert# has been triggered by the rectifier. the power supply differentiates between internal faults that are within the power supply and external faults that the power supply protects itself from, such as overload or input voltage out of limits. the fault led, fault pin or i2c alarm is not asserted for external faults. every attempt is made to annunciate external faults. some of these annunciations can be observed by looking at the input leds. these fault categorizations are predictive in nature and therefore there is a likelihood that a categorization may not have been made correctly. input voltage out of range: the input led will continue blinking as long as sufficient power is available to power the led. if the input voltage is completely gone the input led is off.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; outputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric com pany. all rights reserved. page 12 state change definition a state_change is an indication that an event has occurred that the master should be aware of. the following events shall trigger a state_change ; ? initial power-up of the system when ac gets turned on . this is the indication from the rectifier that it has been turned on. note that the master needs to read the status of each power supply to reset the system_interrupt . if the power supply is back-biased through the 8v_int or the 5vstb it will not issue an smbalert# when ac power is turned back on. ? whenever the power supply gets hot-plugged into a working system. this is the indicator to the system (master) that a new power supply is on line. ? any changes in the bit patterns of the status and alarm registers are a status change which triggers the smbalert# flag. note that a host- issued command such as clear_faults will not trigger an smb hot plug procedures careful system control is recommended when hot plugging a power supply into a live system. it takes about 15 seconds for a power supply to configure its address on the bus based on the analog voltage levels present on the backplane. if communications are not stopped during this interval, multiple power supplies may respond to specific instructions because the address of the hot plugged power supply always defaults to xxxx000 (depending on which device is being addressed within the power supply) until the power supply configures its address. the recommended procedure for hot plug is the following: the system controller should be told which power supply is to be removed. the controller turns the service led on, thus informing the installer that the identified power supply can be removed from the system. the system controller should then poll the module_present signal to verify when the power supply is re-inserted. it should time out for 15 seconds after this signal is verified. at the end of the time out all communications can resume. predictive failures alarm warnings that do not cause a shutdown are indicators of potential future failures of the power supply. for example, if a thermal sensor failed, a warning is issued but an immediate shutdown of the power supply is not warranted. another example of potential predictive failure mechanisms can be derived from information such as fan speed when multiple fans are used in the same power supply. if the speed of the fans varies by more than 20% from each other, this is an indication of an impending fan wear out. the goal is to identify problems early before a protective shutdown would occur that would take the power supply out of service. external eeprom a 64k-bit eeprom is provided across the i 2 c bus. this eeprom is used for both storing fru_id information and for providing a scratchpad memory function for customer use. functionally the eeprom is equivalent to the st m34d64 part that has its memory partitioned into a write protected upper ? of memory space and the lower ? section that cannot be protected. fru_id is written into the write protected portion of memory. write protect feature: writing into the upper 1/4 of memory can be accomplished either by hardware or software. the power supply pulls down the write_protect (wp) pin to ground via a 500 ? resistor between the ?module_present? signal pin and logic_grd (see the module present signal section of input signals). writing into the upper ? of memory can be accomplished by pulling hi the module_present pin. an alternative, and the recommended approach, is to issue the enable_write command via software. page implementation: the external eeprom is partitioned into 32 byte pages. for a write operation only the starting address is required. the device automatically increments the memory address for each byte of additional data it receives. however, if the 32 byte limit is exceeded the device executes a wrap-around that will start rewriting from the first address specified. thus byte 33 will replace the first byte written, byte 34 the second byte and so on. one needs to be careful therefore not to exceed the 32 byte page limitation of the device.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; ou tputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2012 general electric company. all rights reserved. page 13 alarm table power supply led state monitoring signals (referenced to logic_grd) condition in ok green dc ok green service amber fault red fault otw power ok i_limit module present ok 1 1 0 0 hi hi hi hi lo thermal alarm (5c before shutdown) 1 1 1 0 hi lo hi hi lo thermal shutdown 1 0 1 1 lo lo lo hi lo defective fan 1 0 0 1 lo hi lo hi lo blown input fuse in unit 1 0 0 1 lo hi lo hi lo no input > 8ms (single unit) 0 1 0 0 hi hi lo 2 hi lo input present but not within limits 0 0 0 0 hi hi lo hi lo input not present (with back bias) 0 0 0 0 hi hi lo hi lo over voltage latched shutdown 1 0 0 1 lo hi lo hi lo over current 1 blinks 0 0 hi hi lo lo lo over current shutdown 1 0 0 0 hi hi lo lo lo non-catastrophic internal failure 1 1 1 0 1 lo hi hi hi lo 1 missing module (external pull-up) hi standby (remote) 1 0 0 0 hi hi lo hi lo service request (i 2 c mode) 1 1 blinks 0 hi hi hi hi lo 1 any detectable fault condition that does not result in the power supply shutting down. for example, oring fet failure, boost s ection out of regulation, etc. 2 signal transition from hi to lo is output load dependent output connector mating connector: amp 1450572-1 p1 a 6p7 a 1 signal output power input power 6 5 4 3 2 1 p7 p6 p5 p4 p3 p2 p1 a scl_0 mod_pres ilimit logic_grd rs 485+ unit_addr v_out (-dc) v_out (+dc) co_rtn vin ( + ) earth (gnd) co_line vin ( - ) b scl_1 otw alert#_ 0 alert#_1 rs 485- 8v_int c sda_0 margin enable reset ishare n/c d sda_1 fault 5va power_ok on/off shelf_addr connector is viewed from the rear positioned inside the power supply. signal pins columns 1 and 2 are referenced to v_out (-dc). signal pins columns 3 through 6 are referenced to logic grd. last-to-make first-to-break pins. first-to-make last-to-break longest pin implemented in the mating connector. n/c ? no connect pins must be left open. do not connect these pins to either voltage sources or ground.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; ou tputs: 54vdc @ 2000w; 5vdc @ 4w august 20, 2013 ?2013 general electric company. all rights reserved. page 14 signal definitions all hardware alarm signals (fault, power_ok, i_limit, otw) are open drain fets. these signals should be pulled hi to either 3.3 v or 5v. maximum sink current 5ma. an active lo signal (< 0.4vdc) state is referenced to logic grd unless otherwise stated. contact your lineage powe r representative for more details. function label type description output enable enable input if shorted to logic_grd, the pem output is enabled when using i 2 c mode of operation. may also be toggled to reset a latched off pem. output good power_ok output an open drain fet; normally hi, indicating output power is present. changes to lo when the main output is off, current limit i_limit output an open drain fet; normally hi, indicating normal operation. changes to lo when in current limit, i 2 c interrupt alert#_0 alert#_1 output interrupt signal via i 2 c lines indicating that service is requested from the host controller. this signal pin is pulled up to 3.3v via a 10k ? resistor and switches to active lo when an interrupt occurs. pem fault fault output indicates that an internal fault exists. an open drain fet; normally hi, changes to lo. module present mod_pres output used to indicate presence of pem. on/off on/off input short pin, connects last and breaks first; used to activate and deactivate output during hot-insertion and extraction, respectively. ref: v_out (-dc) margining margin input allows changing of output voltage through an analog voltage input or via resistor divider. over-temperature warning otw output an open drain fet; normally hi, changes to lo approximately 5c prior to thermal shutdown. pem address unit_addr input voltage level addressing of pems within a single shelf. ref: v_out (-dc). shelf address shelf_addr input voltage level addressing of pems within multiple shelves. ref: v_out (-dc). back bias 8v_int _ diode or?ed 8vdc drain; used to back bias microprocessors and dsp of failed pem from operating pems. ref: v_out (-dc). mux reset reset input resets the i 2 c lines to i 2 c line 0. standby power 5va output 5v at 0.75a provided for external use by either adjacent power supplies or the using system. current share ishare - a single wire interface between each of the power unit forces them to share the load current. ref: v_out (-dc). i 2 c line 0 scl_0, sda_0 input i 2 c line 0. i 2 c line 1 scl_1, sda_1 input i 2 c line 1.
ge data sheet cp2000dc54-pe series dc-dc converter input: -40vdc to -72vdc; ou tputs: 54vdc @ 2000w; 5vdc @ 4w contact us for more informatio n, call us at usa/canada: +1 888 546 3243 , or +1 972 244 9288 asia-pacific: +86.021.54279977*808 europe, middle-east and africa: +49.89.878067-280 india: +91.80.28411633 www.ge.com/powerelectronics august 20, 2013 ?2012 general electric company. all rights reserved. page 15 front panel leds analog mode i 2 c mode on: input ok off: input out of limits on: output ok blinking: overload over-temperature warning on: over-temperature warning blinking: service ! dimensions top v iew front v iew rear v iew 13.85 in. (351.2 mm) 4.00 in. (101.6 mm) 1.63 in. (41.4 mm) ordering information item description comcode cp2000dc54-pe designed and factory tested to ieee802.3af poe compliance, auxiliary output: 5vdc at 0.75a. cc109146692 consult the 1u shelf data sheet for potential shelf configurations for this module from ge energy. on: fault

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